tm march 2008 ?2008 fairchild semiconductor corporation FDMC8296 rev.b www.fairchildsemi.com 1 FDMC8296 n-channel power trench ? mosfet FDMC8296 n-channel power trench ? mosfet 30v, 18a, 8.0m ? features ? max r ds(on) = 8.0m ? at v gs = 10v, i d = 12a ? max r ds(on) = 13.0m ? at v gs = 4.5v, i d = 10a ? high performance trench tech nology for extremely low r ds(on) ? termination is lead-free and rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process that has been especially tailored to minimize the on-state resistance. this device is welll suited for power management and load switching applications common in notebook computers and portable battery packs. application ? high side in dc - dc buck converters ? notebook battery power management ? load switch in notebook mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25c 18 a -continuous (silicon limited) t c = 25c 44 -continuous t a = 25c (note 1a) 12 -pulsed 52 e as single pulse avalanche energy (note 3) 60 mj p d power dissipation t c = 25c 27 w power dissipation t a = 25c (note 1a) 2.3 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 4.6 c/w r ja thermal resistance, junction to ambient (note 1a) 53 device marking device package reel size tape width quantity FDMC8296 FDMC8296 power 33 13?? 12mm 3000 units d top power 33 s s g s d d d pin 1 bottom g s s s d d d d 5 6 7 8 3 2 1 4
FDMC8296 n-channel power trench ? mosfet www.fairchildsemi.com 2 FDMC8296 rev.b electrical characteristics t j = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0v 30 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 17 mv/ c i dss zero gate voltage drain current v ds = 24v, 1 p a v gs = 0v, t j = 125 c 250 i gss gate to source leakage current v gs = 20v, v ds = 0v 100 na on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 1.0 1.9 3.0 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -6 mv/ c r ds(on) static drain to source on resistance v gs = 10v, i d = 12a 6.5 8.0 m : v gs = 4.5v, i d = 10a 9.5 13.0 v gs = 10v, i d = 12a, t j = 125 c 9.0 12.8 g fs forward transconductance v dd = 5v, i d = 12a 44 s dynamic characteristics c iss input capacitance v ds = 15v, v gs = 0v, f = 1mhz 1038 1385 pf c oss output capacitance 513 685 pf c rss reverse transfer capacitance 87 135 pf r g gate resistance f = 1mhz 0.9 : switching characteristics t d(on) turn-on delay time v dd = 15v, i d = 12a, v gs = 10v, r gen = 6 : 9 18 ns t r rise time 3 10 ns t d(off) turn-off delay time 19 35 ns t f fall time 2 10 ns q g(tot) total gate charge v gs = 0v to 10v v dd = 15v, i d = 12a 16 23 nc v gs = 0v to 4.5v 7.6 10.6 nc q gs total gate charge 3 nc q gd gate to drain ?miller? charge 2.5 nc drain-source diod e characteristics v sd source to drain diode forward voltage v gs = 0v, i s = 12a (note 2) 0.82 1.3 v v gs = 0v, i s = 1.9a (note 2) 0.73 1.2 t rr reverse recovery time i f = 12a, di/dt = 100a/ p s 25 45 ns q rr reverse recovery charge 9 18 nc notes: 1. r t ja is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 30 0 p s, duty cycle < 2.0%. 3.
FDMC8296 n-channel power trench ? mosfet www.fairchildsemi.com 3 FDMC8296 rev.b typical characteristics t j = 25c unless otherwise noted figure 1. 012345 0 10 20 30 40 50 v gs = 3v v gs = 4.5v v gs = 3.5v pulse duration = 80 p s duty cycle = 0.5%max v gs = 4v v gs = 10v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 01020304050 0 1 2 3 4 5 6 v gs = 10v pulse duration = 80 p s duty cycle = 0.5%max normalized drain to source on-resistance i d , drain current(a) v gs = 4v v gs = 3.5v v gs = 3v v gs = 4.5v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 i d = 12a v gs = 10v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0 10 20 30 40 50 i d = 12a t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5%max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 12345 0 10 20 30 40 50 t j = 25 o c t j = -55 o c v ds = 5v pulse duration = 80 p s duty cycle = 0.5%max t j = 150 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0v i s , reverse drain current (a) v sd , body diode forward voltage (v) 50 s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMC8296 n-channel power trench ? mosfet www.fairchildsemi.com 4 FDMC8296 rev.b figure 7. 0 3 6 9 12 15 18 0 2 4 6 8 10 i d = 12a v dd = 20v v dd = 10v v gs , gate to source voltage(v) q g , gate charge(nc) v dd = 15v gate charge characteristics figure 8. 0.1 1 10 30 30 100 1000 3000 f = 1mhz v gs = 0v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1 t j = 25 o c t j = 125 o c t av , time in avalanche(ms) i as , avalanche current(a) 30 10 u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 10 20 30 40 50 v gs = 4.5v r t jc = 4.6 o c/w v gs = 10v i d , drain current (a) t c , case temperature ( o c ) limited by package m a x i m u m c o n t i n u o u s d r a i n c u r r e n t v s c a s e t e m p e r a t u r e figure 11. 0.01 0.1 1 10 100 0.01 0.1 1 10 100 dc 10s 1s 100ms 10ms 1ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c fo rw ard bi as safe operating area figure 12. 10 -3 10 -2 10 -1 110 100 1000 1 10 100 200 single pulse r t ja = 125 o c/w t a = 25 o c 0.5 v gs = 10v p ( pk ) , peak transient power (w) t, pulse width (s) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25c unless otherwise noted
FDMC8296 n-channel power trench ? mosfet www.fairchildsemi.com 5 FDMC8296 rev.b figure 13. transient thermal response curve 10 -3 10 -2 10 -1 110 100 1000 0.005 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25c unless otherwise noted
FDMC8296 n-channel power trench ? mosfet www.fairchildsemi.com 6 FDMC8296 rev.b dimensional outline and pad layout
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